The variation in threshold voltage (Vth) of field effect transistors (FET), i.e., the voltage required to permit or prevent current flow between its source and drain terminals, leads to undesirable effects and limitations in the operating range of integrated circuits. Many analog circuits depend on the use of transistors and the threshold matching inherent to those circuits. Conventional complementary metal-oxide semiconductor (CMOS) technology can exhibit device Vth mismatches in the multi-millivolt range. Analog circuits using CMOS including analog to digital converters, comparators, and certain types of amplifiers are susceptible to Vth mismatches. Altering the Vth of FETs by corresponding changes in circuit design may compensate for variability in the manufacturing process. Typically, charge pumps or other circuits are used to change the bias on the substrate or backgate of the FET to alter the Vth of the FETs. However, this form of compensation conventionally affects the entire integrated circuit because the substrate of at least one of the device types, p- or n-, appears throughout the device structure. With the advent of silicon-on-insulator (SOI) technology, the backgates of both device types ‘p’ and ‘n’ are now isolated for each individual transistor. SOI technology may allow users to drive isolated backgates of a transistor to either a high reverse bias of the source-substrate junction to minimize source-drain leakage current in the “off” mode, and to a slightly forward biased region of operation to enhance the source-drain current in the “on” mode.